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Intel's TDX flush bit was never set. The patches delete the flush.

October 15 patches drop Linux cache flushes before memory is handed to Intel TDX. The author says no module set the bit that required them. Phoronix notes no speed figure.

The short version

The October 15, 2026 patch series drops the Linux flushes that ran before memory was given to the Intel TDX module. The cover letter says the CLFLUSH_BEFORE_ALLOC bit has never been set, and that hardware handles the key change without software help. The series is based on Linux 7.3-rc7 and is not described as merged. Phoronix says the messages include no performance estimate.

A bit the modules never turned on

The cover letter, posted for review on October 15, 2026, says early TDX design assumed software would flush caches when memory moved between encryption keys. The hardware, the letter says, turned out to handle that transition itself, but the architecture text that required the flush remained. Linux flushed anyway, because flushing on every handoff was simpler than testing the bit. The bit is CLFLUSH_BEFORE_ALLOC. The letter says no module has set it. The patches delete the flush rather than keep a test for a flag that stays off.the hardware desk.

What the diff actually touches

The series is two patches. One drops the flush helpers. The other drops a write-back helper used on the same path. The cover letter's stat is four files under the x86 TDX and KVM code, six lines added and 86 removed. The author asks for review before the patches go to the maintainers, and he notes that deleting the flush also lets a later huge-page series avoid teaching the flush about larger pages. A cleanup that unblocks another series is still a cleanup. It is not, by itself, a benchmark.what a version number has to mean.

Documentation is promised, not linked

The letter says the TDX documents will be updated to say the bit will never be set. The update is described as future. This page will not cite a PDF that has not been named. Until that revision exists, the evidence that the flush is unnecessary is the author's statement that no module has set the bit, plus the hardware behavior he describes. A reader who wants the old requirement still has the behavior in current kernels, which is why the patches exist.Futureweb.

Phoronix's account stops where the letter stops

Phoronix, on October 18, retells the series and quotes the explanation that hardware did not need the software help. It says the change may help virtual-machine performance by skipping needless flushes, and then it says the patch messages themselves contain no performance estimate. The word may is the outlet's. The absence of a number is the fact this page keeps. A headline that implies a measured speedup would be ahead of both documents.the paper.

September's note is the same author, earlier

A September 22 message on the kernel list, from the same Intel engineer, already argued for deleting the flush because the bit had never been set. The October series is a second version, rebased on 7.3-rc7. Two postings are one proposal aging in review. They are not two independent labs. Phoronix is the trade account. The mailing list is the proposal. Asked directly, Is the series in a released kernel? The cover letter says it is based on Linux 7.3-rc7 and asks for more review before maintainers look. Phoronix calls the patches pending. Pending is not merged.Linux 7.3's other hotfix.

Confidential computing is the setting, not a new advisory

TDX is Intel's confidential-virtual-machine feature. The patches do not describe a vulnerability, a workaround, or an attack. They describe code that flushed caches on a condition the author says never occurs. This page will not turn a deletion into a hardening guide. Operators do not need a new setting. They need to know the flush may disappear in a future kernel if maintainers take the series. Asked directly, Does anyone in these sources give a speedup? No. Phoronix says the patch messages do not estimate a performance impact. This page will not invent one.

What would make the flush necessary again

A TDX module that sets the bit, or a documentation revision that keeps the requirement, would make the deletion wrong. A maintainer rejecting the series would leave current kernels flushing. A merged tag in a released kernel would move the sentence from pending to shipped. None of those is the state of the October 15 letter. Asked directly, Why does the author say the flush was unused? The module exposes a bit, CLFLUSH_BEFORE_ALLOC, for whether the host must flush first. The letter says no TDX module has ever set that bit, and that a future documentation update will say no future module will set it either.the advisory is a different kind of record.

Who is in scope

People running Intel TDX guests on Linux, and kernel reviewers on the x86 virtualization lists. A cloud customer who never asks for a confidential virtual machine is outside the flush. The Xeon history Phoronix gives is context for where TDX already exists, not a recall. Asked directly, What code does the series delete? Helpers that flushed cache lines, and a related write-back path, before pages were handed to the TDX module. The cover letter's diffstat is 4 files, 6 insertions, and 86 deletions. This page names the removal. It does not reprint the patch.

What stays specific

October 15, 2026, version 2, based on Linux 7.3-rc7, four files, the bit never set, documentation update still ahead, no performance number in the messages. Phoronix on October 18 is the account. The cover letter is the proposal. The short answer this page will stand on is this: The October 15, 2026 patch series drops the Linux flushes that ran before memory was given to the Intel TDX module. The cover letter says the CLFLUSH_BEFORE_ALLOC bit has never been set, and that hardware handles the key change without software help. The series is based on Linux 7.3-rc7 and is not described as merged. Phoronix says the messages include no performance estimate.

Sources

The reports this brief is filing. Futureweb did not republish them.

  1. Patch cover letter
  2. Phoronix
  3. Earlier patch explanation

Questions

What code does the series delete?

Helpers that flushed cache lines, and a related write-back path, before pages were handed to the TDX module. The cover letter's diffstat is 4 files, 6 insertions, and 86 deletions. This page names the removal. It does not reprint the patch.

Why does the author say the flush was unused?

The module exposes a bit, CLFLUSH_BEFORE_ALLOC, for whether the host must flush first. The letter says no TDX module has ever set that bit, and that a future documentation update will say no future module will set it either.

Is the series in a released kernel?

The cover letter says it is based on Linux 7.3-rc7 and asks for more review before maintainers look. Phoronix calls the patches pending. Pending is not merged.

Does anyone in these sources give a speedup?

No. Phoronix says the patch messages do not estimate a performance impact. This page will not invent one.

What hardware does Phoronix say already shipped TDX?

It says TDX first appeared on some Sapphire Rapids Xeon parts and has been on Xeon processors since Emerald Rapids. That history is the outlet's. The patch is about software flushes, not a new chip.